The idea of machines that can build even better machines sounds like sci-fi, but the concept is becoming a reality as companies like Cadence tap into generative AI to design and validate next-gen ...

Siemens has locked in electronic design automation (EDA) tool certifications across four of TSMC’s most advanced chip ...

Craig Johnson, Vice President of Strategy at Siemens EDA, delves into EDA, AI, and comprehensive digital twins.

Nvidia has made another major move by investing US$2 billion in Synopsys, one of the world's largest chip design and engineering software companies. The investment will expand Nvidia's reach into ...

SiS talks to Lorenzo Servadei, Head of AI for Chip Design, Sony AI. SIS: How do you see AI-powered EDA redefining the chip ...

How can chips continue to advance? Agentic AI may be the answer, according to Mark Ren, founder and CEO of Agentrys, who gave the Wednesday keynote at DesignCon, Agentic AI for Chip Design. “How many ...

Hi, everybody. My name is [ Natalia Winkler ]. I'm a semiconductor analyst here at UBS. I'm very excited to have Anirudh Devgan with us, CEO of Cadence Design Systems. Before we start, I want to read ...

We live in an AI era, but behind the buzzword lies an intricate world of hardware and software building blocks. Like every other design, AI systems span multiple dimensions, ranging from processors ...

Cognichip said today it has raised $60 million in funding to try to accelerate momentum for the emerging concept of physics-informed chip design powered by advanced artificial intelligence models. The ...

Samsung Electronics has backed AI chip design startup Normal Computing in a US$50 million funding round, expanding its push into AI-driven electronic design automation and next-generation ...

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. Electronic Design Automation leader, Cadence Design Systems is ...

What type of chiplet interconnects are being used now? How do network-on-chip (NoC) systems work with chiplet standards like UCIe and BoW? No one wants to design high-performance chips from the ground ...